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VC-707
LVPECL, LVDS Crystal Oscillator Data Sheet Previous Vectron Model VCC6
VC-707
Description
Vectron's VC-707 Crystal Oscillator is a quartz stabilized, differential output oscillator, operating off 3.3 volt supply, hermetically sealed 5x7 ceramic package.
Features
* * * * * * 3.3V Operation Output Frequencies to 800MHz Differential Output Enable/Disable -10/70C or -40/85C Operation Hermetically Sealed 5x7 Ceramic Package * * * * * * * * *
Applications
Storage Area Networking Telecom Ethernet, GE, SynchE Fiber Channel PON Driving A/D's, D/A's, FPGA's Test and Measurement Medical COTS
* Product is compliant to RoHS directive and fully compatible with lead free assembly
Block Diagram
VDD Complementary Output Output
Crystal
Oscillator
PLL
E/D or NC
E/D or NC
Gnd
Vectron International * 267 Lowell Road, Hudson, NH 03051 * Tel: 1-88-VECTRON-1 * http://www.vectron.com Page1
Performance Specifications
Table 1. Electrical Performance, LVPECL Option Parameter
Voltage1 Current (No Load) Nominal Frequency
2
Symbol
VDD IDD
Min
Supply 3.15 Frequency
Typical
3.3
Maximum
3.45 100
Units
V mA MHz ppm V
fN
270 20, 25, 32, 50, 100 Outputs
800
Stability2,3 (Ordering Options) Output Logic Levels , -10/70C Output Logic High Output Logic Low Output Logic Levels4, -40/85C Output Logic High Output Logic Low Output Rise and Fall Time4 Rise Time Fall Time Output Load Duty Cycle
5 4
VOH VOL VOH VOL tR/tF
VDD-1.025 VDD-1.810 VDD-1.085 VDD-1.830
VDD-0.880 VDD-1.620 V VDD-0.880 VDD-1.555 600 600 50 ohms to VDD-1.3V ps ps % ps ps ps V V uA ms C
45 J J
50 2 4 30
55
Jitter (12 kHz - 20 MHz BW)155.52MHz6 Period Jitter7 RMS P/P Output Enabled Output Disabled Start-Up Time Operating Temp. (Ordering Option)
8
Enable/Disable VIH VIL tSU TOP -10/70 or -40/85 0.7*VDD 0.3*VDD 200 10
Enable/Disable Leakage Current
Package Size 5.0 x 7.0 x 1.8 or 5.08x7.5x2.2 mm 1. The VC-707 power supply pin should be filtered, eg, a 0.1 and 0.01uf capacitor. 2. See Standard Frequencies and Ordering Information for more information. 3. Includes calibration tolerance, operating temperature, supply voltage variations,, aging and IR reflow. 4. Figure 2 defines these parameters and Figure 1 defines the test circuit. 5. Duty Cycle is defines as the On/Time Period. 6. Measured using an Agilent E5052, 155.520MHz. Please see "Typical Phase Noise and Jitter Report for the VC-706 series". 7. Measured using a LeCroy 8600, 25K samples. 8. Outputs will be Enabled if Enable/Disable is left open.
VDD -1.3V
tR VOH 50%
tF
1 NC 2 NC 3
6 5
VOL
4 50 50
On Time
-1.3V
Figure 1
Period
Figure 2
Vectron International * 267 Lowell Road, Hudson, NH 03051 * Tel: 1-88-VECTRON-1 * http://www.vectron.com Page2
Performance Specifications
Table 2. Electrical Performance, LVDS Option Parameter
Voltage1 Current (No Load) Nominal Frequency
2
Symbol
VDD IDD
Min
Supply 3.15 Frequency
Typical
3.3
Maximum
3.45 60
Units
V mA MHz ppm V
fN
260 Outputs
800.000 20, 25, 32, 50, 100
Stability2,3, (Ordering Options) Output Logic Levels Output Logic High Output Logic Low Differential Output Differential Output Error Offset Voltage Offset Voltage Error Output Leakage Current Output Load Output Rise and Fall Time4 Rise Time Fall Time Duty Cycle5 Jitter (12 kHz - 20 MHz BW)155.52MHz Period Jitter7 RMS P/P Output Enabled8 Output Disabled Enable/Disable Leakage Current Start-Up Time Operating Temp. (Ordering Option) Package Size tSU TOP
6 4
VOH VOL
0.9 247 1.125
1.40 1.10 330 1.25
1.6 454 50 1.375 50 10 mV mV V mV uA
100 ohms differential tR/tF 600 600 45 J J 4 30 Enable/Disable VIH VIL 0.7*VDD 0.3*VDD 200 10 -10/70 or -40/85 5.0 x 7.0 x 1.8 or 5.08x7.5x2.2 V V uA ms C mm ps ps 50 2 55 ps ps % ps
1. The VC-707 power supply pin should be filtered, eg, a 0.1 and 0.01uf capacitor. 2. See Standard Frequencies and Ordering Information for more information. 3. Includes calibration tolerance, operating temperature, supply voltage variations,, aging and IR reflow. 4. Figure 2 defines these parameters and Figure 3 defines the test circuit. 5. Duty Cycle is defines as the On/Time Period. 6. Measured using an Agilent E5052, 155.520MHz. Please see "Typical Phase Noise and Jitter Report for the VCC6 series". 7. Measured using a LeCroy 8600, 25K samples. 8. Outputs will be Enabled if Enable/Disable is left open.
Out 50 50 Out 0.01 uF
DC
6 1
5 2
4 3
Figure 3
Vectron International * 267 Lowell Road, Hudson, NH 03051 * Tel: 1-88-VECTRON-1 * http://www.vectron.com Page3
Package and Pinout
Table 3. Pinout Pin #
1 2 3 4 5 6
Symbol
E/D or NC E/D or NC GND fO CfO VDD
Function
Enable Disable or No Connection Enable Disable or No Connection Electrical and Lid Ground Output Frequency Complementary Output Frequency Supply Voltage The Enable/Disable function is set at the factory on either pin 1 or pin 2 and is an ordering option
6
7.00.15 5 Part Number Frequency Date Code
4
6
7.490.15 5 Part Number Frequency Date Code
4
5.00.15
5.080.15
1
2 1.397
3 1.6 max 1.27
1
2 1.397
3 2.16 max 1.27
1 6
2 Bottom View 5
3 3.57 4
1 6
2 Bottom View 5
3 3.57 4
2.54 5.08 5.08
2.54
Figure 4 Package A Outline Drawing
Figure 5 Optional Package Outline Drawing
The VC-707 can be supplied in one of two package options and Figure 4 shows the primary package used. The pad layout and dimesnions are identical and a reel would include only 1 of the two options 1.78
1.96
3.66
2.54 5.08
Figure 6 Pad Layout
Vectron International * 267 Lowell Road, Hudson, NH 03051 * Tel: 1-88-VECTRON-1 * http://www.vectron.com Page4
LVPECL Application Diagrams
Figure 7 Standard PECL Output Configuration
Figure 8 Single Resistor Termination Scheme Resistor values are typically 120 to 240 ohms for 3.3V operation. Resistor values are typically 82 to 120 ohms for 2.5V operation.
Figure 9 Pull-Up Pull Down Termination Resistor values are typically for 3.3V operation For 2.5V operation, the resistor to ground is 62 ohms and the resistor to supply is 240 ohms
The VC-707 incorporates a standard PECL output scheme, which are un-terminated emitters as shown in Figure 7. There are numerous application notes on terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 8, and a pull-up/pull-down scheme as shown in Figure 9. An AC coupling capacitor is optional, depending on the application and the input logic requirements of the next stage.
LVDS Application Diagrams
VCC
LVDS Driver
100
LVDS Receiver
LVDS Driver
100
Receiver
OUT+ OUT-
Figure 11 LVDS to LVDS Connection, Internal 100ohm Some LVDS structures have an internal 100 ohm resistor on the input and do not need additional components.
Figure 10 Standard LVDS Output Configuration
Figure 12 LVDS to LVDS Connection External 100ohm and AC blocking caps Some input structures may not have an internal 100 ohm resistor on the input and will need an external 100ohm resistor for impedance matching. Also, the input may have an internal DC bias which may not be compatible with LVDS levels, AC blocking capacitors can be used.
One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-terminated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems.
Environmental and IR Compliance
Table 4. Environmental Compliance Parameter
Mechanical Shock Mechanical Vibration Temperature Cycle Solderability Fine and Gross Leak Resistance to Solvents Moisture Sensitivity Level Contact Pads
Condition
MIL-STD-883 Method 2002 MIL-STD-883 Method 2007 MIL-STD-883 Method 1010 MIL-STD-883 Method 2003 MIL-STD-883 Method 1014 MIL-STD-883 Method 2015 MSL1 Gold over Nickel
Vectron International * 267 Lowell Road, Hudson, NH 03051 * Tel: 1-88-VECTRON-1 * http://www.vectron.com Page5
IR Compliance
S Suggested IR Profile Devices are built using lead free epoxy and can be subjected to standard lead free IR reflow conditions shown in Table 5. Contact pads are gold over nickel and lower maximum temperatures can also be used, such as 220C. Table 5. Reflow Profile Parameter
PreHeat Time Ramp Up Time above 217C Time to Peak Temperature Time at 260C Time at 240C Ramp down
260
tL RUP tP RDN tS tAMB-P
Temperature (DegC)
217 200 150
Symbol
ts RUP tL tAMB-P tP tP2 RDN
Value
200 sec Max 3C/sec Max 150 sec Max 10 sec Max 60 sec Max 6C/sec Max
480 sec Max Reliability
25
Time (sec)
Maximum Ratings, Tape & Reel
S
Absolute Maximum Ratings and Handling Precautions Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied or any other excess of conditions represented in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended periods may adversely affect device reliability.
Although ESD protection circuitry has been designed into the VC-707, proper precautions should be taken when handling and mounting, VI employs a Human Body Model and Charged Device Model for ESD susceptibility testing and design evaluation. ESD thresholds are dependent on the circuit parameters used to define the model. Although no industry standard has been adopted for the CDM a standard resistance of 1.5kOhms and capacitance of 100pF is widely used and therefor can be used for comparison purposes. Table 6. Maximum Ratings Parameter
Storage Temperature Supply Voltage Enable Disable Voltage ESD, Human Body Model ESD, Charged Device Model
Symbol
TSTORE
Rating
-55/125 -0.5 to 5.0 -0.5 to VDD+0.5 1000 1000
Unit
C V V V
Table 7. Tape and Reel Information Tape Dimensions (mm)
W 16 F 7.5 Do 1.5 Po 4 P1 8 A 180 B 2
Reel Dimensions (mm)
C 13 D 21 N 50 W1 17 W2 21 #/Reel 200
Vectron International * 267 Lowell Road, Hudson, NH 03051 * Tel: 1-88-VECTRON-1 * http://www.vectron.com Page6
Table 8. Standard Frequencies (MHz)
311.040 472.000 693.4829 312.000 500.000 693.750 312.500 600.000 700.000 320.000 622.080 779.5686 322.2656 625.000 332.000 644.5313 333.000 657.4219 350.000 666.5413 400.000 669.3236 446.000 669.3265
Ordering Information
VC-707- E C E - K A A N - xxxMxxxxxx
Frequency in MHz Product XO Package 5x7 Voltage Options E: +3.3 Vdc 5% H: +2.5 Vdc 5% Output C: LVPECL D: LVDS Temp Range W: -10/70C E: -40/85C
*Note: not all combination of options are available. Other specifications may be available upon request.
Other (Future Use) N: Standard Enable/Disable Pin A: Pin 1 B: Pin 2 Enable/Disable Logic A: Enable High Stability E: 20ppm F: 25ppm K: 50ppm S: 100ppm
Example: VC-707-ECE-KAAN-622M080000
For Additional Information, Please Contact
USA:
Vectron International 267 Lowell Road Hudson, NH 03051 Tel: 1.888.328.7661 Fax: 1.888.329.8328
Europe:
Vectron International Landstrasse, D-74924 Neckarbischofsheim, Germany Tel: +49 (0) 3328.4784.17 Fax: +49 (0) 3328.4784.30
Asia:
Vectron International 1F-2F, No 8 Workshop, No 308 Fenju Road WaiGaoQiao Free Trade Zone Pudong, Shanghai, China 200131 Tel: 86.21.5048.0777 Fax: 86.21.5048.1881
Disclaimer
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
Rev: 01/10/2009 Vectron International * 267 Lowell Road, Hudson, NH 03051 * Tel: 1-88-VECTRON-1 * http://www.vectron.com Page7

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